[PATCH] D94816: [P10] [Power PC] Exploiting new load rightmost vector element instructions.

[Kamau Bridgeman via Phabricator via llvm-commits]

kamaub created this revision.
kamaub added reviewers: PowerPC, lei, stefanp, nemanjai, amyk.
Herald added subscribers: steven.zhang, kbarton, hiraditya.
kamaub requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This pull request implements patterns to exploit the load rightmost vector
element instructions for loading element 0 on little endian PowerPC subtargets
into v8i16 and v16i8 vector registers for i16 and i8 data types.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94816

Files:
  llvm/lib/Target/PowerPC/PPCInstrPrefix.td
  llvm/lib/Target/PowerPC/PPCInstrVSX.td
  llvm/test/CodeGen/PowerPC/load-rightmost-vector-elt.ll

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