[PATCH] D88569: [DAGCombiner] Call SimplifyDemandedBits to simplify EXTRACT_VECTOR_ELT

Fri Jan 15 09:53:56 PST 2021

foad added inline comments.

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Comment at: llvm/test/CodeGen/X86/buildvec-insertvec.ll:783
   %5 = insertelement <4 x i32> undef, i32 %3, i32 undef
   store i32 %4, i32* undef
   ret <4 x i32> %5
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RKSimon wrote:
> this should simplify to "store i32 undef, store i32* undef" and be removed - can you check why it isn't please?
The value being stored is not undef, it's either -2147483648 or poison, depending on the value of %a0.

Anyway -simplifycfg would change the store into a trap + unreachable, but nothing in llc's codegen pipeline does that.

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Comment at: llvm/test/CodeGen/X86/vec_setcc.ll:223
+; SSE41-NEXT:    pmovsxwd %xmm1, %xmm0
+; SSE41-NEXT:    movd %xmm1, %eax
+; SSE41-NEXT:    pextrb $4, %xmm0, %edx
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RKSimon wrote:
> why didn't this simplify?
What simplification are you expecting?

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88569/new/

https://reviews.llvm.org/D88569