[PATCH] D87464: [TargetLowering] Improve SimplifyDemandedBits for AND and OR

[Jay Foad via Phabricator via llvm-commits]

foad updated this revision to Diff 316872.
foad added a comment.

Rebase. Pass Op0/1DemandedBits into SimplifyMultipleUseDemandedBits.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D87464/new/

https://reviews.llvm.org/D87464

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/Thumb2/mve-vecreduce-addpred.ll
  llvm/test/CodeGen/X86/movmsk-cmp.ll
  llvm/test/CodeGen/X86/pr34137.ll
  llvm/test/CodeGen/X86/shift-parts.ll

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