[PATCH] D94703: [Statepoint] Handle `undef` operands in statepoint.
Denis Antrushin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jan 14 11:42:47 PST 2021
dantrushin created this revision.
dantrushin added reviewers: skatkov, reames.
Herald added a subscriber: hiraditya.
dantrushin requested review of this revision.
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Herald added a subscriber: llvm-commits.
Currently when spilling statepoint register operands in FixupStatepoints
we do not pay attention that it might be `undef`. We just generate a
spill, which may lead to verifier error because we have use without a def.
To handle it, let FixupStateponts ignore `undef` register operands
completely and change them to some constant value when generating
stack map. Use same value as used by ISel for this purpose (0xFEFEFEFE).
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D94703
Files:
llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
llvm/lib/CodeGen/StackMaps.cpp
Index: llvm/lib/CodeGen/StackMaps.cpp
===================================================================
--- llvm/lib/CodeGen/StackMaps.cpp
+++ llvm/lib/CodeGen/StackMaps.cpp
@@ -234,6 +234,12 @@
if (MOI->isImplicit())
return ++MOI;
+ if (MOI->isUndef()) {
+ // Record `undef` register as constant. Use same value as ISel uses.
+ Locs.emplace_back(Location::Constant, sizeof(int64_t), 0, 0xFEFEFEFE);
+ return ++MOI;
+ }
+
assert(Register::isPhysicalRegister(MOI->getReg()) &&
"Virtreg operands should have been rewritten before now.");
const TargetRegisterClass *RC = TRI->getMinimalPhysRegClass(MOI->getReg());
Index: llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
===================================================================
--- llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
+++ llvm/lib/CodeGen/FixupStatepointCallerSaved.cpp
@@ -380,7 +380,9 @@
EndIdx = MI.getNumOperands();
Idx < EndIdx; ++Idx) {
MachineOperand &MO = MI.getOperand(Idx);
- if (!MO.isReg() || MO.isImplicit())
+ // Leave `undef` operands as is, StackMaps will rewrite them
+ // into a constant.
+ if (!MO.isReg() || MO.isImplicit() || MO.isUndef())
continue;
Register Reg = MO.getReg();
assert(Reg.isPhysical() && "Only physical regs are expected");
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