[PATCH] D94612: [LLD][ELF][AArch64] Add support for R_AARCH64_LD64_GOTPAGE_LO15 relocation

[Peter Smith via Phabricator via llvm-commits]

psmith added inline comments.


================
Comment at: lld/ELF/InputSection.cpp:708
     return getAArch64Page(sym.getGotVA() + a) - getAArch64Page(p);
+  case R_AARCH64_GOT_PAGE:
+    return sym.getGotVA() - getAArch64Page(p);
----------------
I think that this should be
```
return getAArch64Page(sym.getGotVA() + a) - getAArch64Page(in.got->getVA());
```
>From https://github.com/ARM-software/abi-aa/blob/master/aaelf64/aaelf64.rst the expression is: G(GDAT(S+A))-Page(GOT)
Where GOT is "GOT is the address of the Global Offset Table"
Page(p) will be the same as Page(GOT) for many entries close to the start of the GOT.

IIUC the intent is to get an offset from the base of the GOT so that the same register can hold the base of the GOT for the whole function.
```
adrp x0, _GLOBAL_OFFSET_TABLE_
ldr x1, [x0, #:gotpage_lo15:foo]
ldr x2, [x0, #:gotpage_lo15:bar]
``` 




================
Comment at: lld/test/ELF/aarch64-gotpage.s:5
+# RUN: llvm-readobj -r %t | FileCheck --check-prefix=RELOCS %s
+
+# Check if the R_AARCH64_LD64_GOTPAGE_LO15 generates the GOT entries.
----------------
This particular test won't catch the case where Page(GOT) != Page(P). Perhaps something like a linker script that puts the GOT at the last 8-bytes of a page (I think .got is 8 byte aligned on AArch64)

.got (0x10000 - 8) : { *.got }

This would put the first entry in the same page as Page(GOT) but the second entry should be in the second page. This should be visible in the ldr disassembly.


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D94612