[PATCH] D94155: [X86] Fix tile config register spill issue.

[Pengfei Wang via Phabricator via llvm-commits]

pengfei added a comment.

> tile config register is the user of each AMX instruction

Should be all AMX instructions are users of tile config register?

> We can start from the instruction of each tile def

I think instructions like tilestore only have tile use, right? How about analyzing the tile instructions? Can we simply add a ldtilecfg after slot1 (assuming it is a call) if we saw tile instructions between slot1 and slot2?

`slot0 ... slot1 ... tileInst1 ... slot2`


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D94155/new/

https://reviews.llvm.org/D94155