[PATCH] D94628: [RISCV] Add implementation of targetShrinkDemandeConstant to optimize AND immediates.

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 316509.
craig.topper added a comment.

-Add support for forming 32 signed immediates as well. That also had good test coverage.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94628/new/

https://reviews.llvm.org/D94628

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/copysign-casts.ll
  llvm/test/CodeGen/RISCV/frame-info.ll
  llvm/test/CodeGen/RISCV/half-bitmanip-dagcombines.ll
  llvm/test/CodeGen/RISCV/rv64Zbp.ll
  llvm/test/CodeGen/RISCV/srem-lkk.ll
  llvm/test/CodeGen/RISCV/srem-vector-lkk.ll
  llvm/test/CodeGen/RISCV/stack-realignment-with-variable-sized-objects.ll
  llvm/test/CodeGen/RISCV/vararg.ll

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