[PATCH] D94589: [RISCV] Add intrinsics for AMO instructions

[Zakk Chen via Phabricator via llvm-commits]

khchen added inline comments.


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Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:589
+      def "int_riscv_" # NAME # "ei" # eew # "_mask" : RISCVAMOMask;
+    }
+  }
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based on https://reviews.llvm.org/D93359#inline-872142
Could we do the similar thing like `vlxe/vsxe` did here?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94589/new/

https://reviews.llvm.org/D94589