[PATCH] D94264: [GlobalISel] Add MachineInstNumbering to CSEInfo and propagate CSE throughout AArch64 pipeline.

[Amara Emerson via Phabricator via llvm-commits]

aemerson updated this revision to Diff 316325.
aemerson added a comment.

Improve the performance of the insertion queue flushing.

For huge basic blocks, this was having hanging in the renumbering. This new version now tries to not flush on removal of an instruction.

The second issue was that in those huge blocks, any time there was multiple insertions, we'd end up renumbering the entire block. For such blocks, this was way too slow. I've added a more intelligent flushing algorithm to instead search up from each instruction in the block's queue, so that we find an instruction that allows us to use the SlotIndexes to do a fast comparison of ordering. This lets us find the begin iterator for a numbering repair, and likewise walk down each queued instruction until we find the post dominator instruction that gives us an "end" iterator.

These two improvements don't really help on CTMark, they only help on very large pathological blocks.

I think it may be worth exploring using some heuristics early in the pipeline like IRTranslation to detect huge blocks, and switch to using this numbering analysis. Otherwise, we can continue to use the simple linked list block walk, which is slightly faster in the common cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94264/new/

https://reviews.llvm.org/D94264

Files:
  llvm/include/llvm/CodeGen/GlobalISel/CSEInfo.h
  llvm/include/llvm/CodeGen/GlobalISel/CSEMIRBuilder.h
  llvm/include/llvm/CodeGen/GlobalISel/Legalizer.h
  llvm/include/llvm/CodeGen/GlobalISel/Localizer.h
  llvm/include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
  llvm/include/llvm/CodeGen/GlobalISel/RegBankSelect.h
  llvm/lib/CodeGen/GlobalISel/CSEInfo.cpp
  llvm/lib/CodeGen/GlobalISel/CSEMIRBuilder.cpp
  llvm/lib/CodeGen/GlobalISel/IRTranslator.cpp
  llvm/lib/CodeGen/GlobalISel/Legalizer.cpp
  llvm/lib/CodeGen/GlobalISel/Localizer.cpp
  llvm/lib/CodeGen/GlobalISel/RegBankSelect.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerCombiner.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PostLegalizerLowering.cpp
  llvm/lib/Target/AArch64/GISel/AArch64PreLegalizerCombiner.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/combine-shift-immed-mismatch-crash.mir
  llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
  llvm/test/CodeGen/AArch64/O0-pipeline.ll

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