[PATCH] D94350: [GlobalISel] Combine (a[0]) | (a[1] << k1) | ...| (a[m] << kn) into a wide load
Jessica Paquette via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 12 12:14:32 PST 2021
paquette added a comment.
Here's some measurements:
O0 compile O0 code #Missed #Missed Avg regs/ | Os compile Os code #Missed #Missed Avg regs/
time change size change combines (> 1 reg) missed combine | time change size change combines (> 1 reg) missed combine
bullet 0.25% 0.00% 22 4 0.5 | 0.56% 0.00% 138 14 0.3
kc 0.05% 0.00% 2 0 0.0 | 0.76% 0.00% 66 0 0.0
lencod -0.18% 0.00% 89 20 0.6 | 0.31% 0.00% 508 34 0.2
SPASS 0.09% 0.00% 1 1 3.0 | 0.37% 0.00% 146 4 0.0
consumer-typeset -0.27% 0.00% 369 52 0.3 | 0.17% 0.00% 625 61 0.2
clamscan -0.09% 0.00% 179 78 1.3 | 0.21% 0.00% 493 49 0.3
sqlite3 -0.48% 0.00% 185 29 0.4 | -0.18% -0.50% 514 91 0.6
tramp3d-v4 0.14% 0.00% 0 0 0.0 | 0.52% 0.00% 253 2 0.0
pairlocalalign -0.04% 0.00% 0 0 0.0 | 0.49% 0.00% 54 48 2.7
7zip-benchmark 0.12% -0.10% 336 273 2.5 | 0.75% -0.40% 565 268 1.6
|
Average -0.04% -0.01% 118.30 45.7 0.87 | 0.40% -0.09% 336 57 0.6
- Compile time was measured using a single thread with 3 samples. Comparison is between geomeans of the samples.
- # Missed combines is the total times that the combine failed
- # Missed (>1 reg) is the number of times the combine failed with at least one register in `RegsToVisit`.
- Avg regs/missed combine is the number of registers in `RegsToVisit` when the combine misses
Note that a lot of the time, the combine does miss with 0 registers (because you just don't find anything with a single use, for example).
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D94350/new/
https://reviews.llvm.org/D94350
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