[PATCH] D94535: [RISCV] Optimize Branch Comparisons

[Sam Elliott via Phabricator via llvm-commits]

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I noticed in D94450 <https://reviews.llvm.org/D94450> that there were quite a few places where we generate
the sequence:

  xN <- comparison ...
  xN <- xor xN, 1
  bnez xN, symbol

Given we know the XOR will be used by BRCOND, which only looks at the lowest
bit, I think we can remove the XOR and just invert the branch condition in
these cases?

The case mostly seems to come up in floating point tests, where there is often
more logic to combine the results of multiple SETCCs, rather than a single
(BRCOND (SETCC ...) ...).


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94535

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/test/CodeGen/RISCV/double-br-fcmp.ll
  llvm/test/CodeGen/RISCV/float-br-fcmp.ll
  llvm/test/CodeGen/RISCV/half-br-fcmp.ll

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