[PATCH] D94454: [PowerPC] Exploit the vinsw, vinsd, and vins[wd][lr]x instructions on P10

[Albion Fung via Phabricator via llvm-commits]

Conanap added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:1235
+
+    if (Subtarget.hasP10Vector()) {
+      setOperationAction(ISD::INSERT_VECTOR_ELT, MVT::v2i64, Custom);
----------------
should we be using `Subtarget.isISA3_1()` instead?


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:10023
+
+  if (Subtarget.hasP10Vector()) {
+    // On P10, we have legal lowering for constant and variable indices for
----------------
Should we be using `Subtarget.isISA3_1()` here as well? 


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94454/new/

https://reviews.llvm.org/D94454