[PATCH] D93755: [VE][isel] Map EVT vectors to vector registers.
Simon Moll via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 12 01:49:22 PST 2021
simoll added a comment.
In D93755#2486652 <https://reviews.llvm.org/D93755#2486652>, @arsenm wrote:
> In D93755#2486281 <https://reviews.llvm.org/D93755#2486281>, @simoll wrote:
>
>> This is one of those patches that has the potential to linger on without review for 1Y+ .. let me know if there is anything i can do to get this reviewed, as it really helps with bringing good vector architecture (long SIMD) support to LLVM. Thanks.
>
> Can I interest you in moving to GlobalISel instead of trying to teach the DAG about new types :)
Definitely! GlobalISel sure has my interest and i am following the development closely. However, we have to make do with what we've got, which is dag-based downstream implementation. I see it that way: the quicker we get this in a stable state and expose the traditional way's intrinsic limitations, the closer we are to switching/contributing to global isel :)
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https://reviews.llvm.org/D93755/new/
https://reviews.llvm.org/D93755
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