[PATCH] D94408: [RISCV] Add scalable vector fadd/fsub/fmul/fdiv ISel patterns

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 315891.
frasercrmck added a comment.

rebase on main


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94408/new/

https://reviews.llvm.org/D94408

Files:
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfadd-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfdiv-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmul-sdnode-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfsub-sdnode-rv64.ll

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