[PATCH] D94014: [InstCombine] reduce icmp(ashr X, C1), C2 to sign-bit test

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri requested changes to this revision.
lebedev.ri added a comment.
This revision now requires changes to proceed.

Sorry for the delay.

alive1 does not actually have a `countLeadingOnes()` precondition
(at least as per https://github.com/nunoplopes/alive/blob/master/constants.py),
so the proof is faulty. `ComputeNumSignBits()`, OTOH, works for me:

  $ cat /tmp/test.ll
  Name: lshr ugt
  Pre: ComputeNumSignBits(C2) <= C1
  %a = lshr i8 %x, C1
  %r = icmp ugt i8 %a, C2
    =>
  %r = icmp slt i8 %x, 0
  
  Name: lshr ult
  Pre: ComputeNumSignBits(C2) <= C1
  %a = lshr i8 %x, C1
  %r = icmp ult i8 %a, C2
    =>
  %r = icmp sgt i8 %x, -1
  
  Name: ashr ugt
  Pre: ComputeNumSignBits(C2) <= C1
  %a = ashr i8 %x, C1
  %r = icmp ugt i8 %a, C2
    =>
  %r = icmp slt i8 %x, 0
  
  Name: ashr ult
  Pre: ComputeNumSignBits(C2) <= C1
  %a = ashr i8 %x, C1
  %r = icmp ult i8 %a, C2
    =>
  %r = icmp sgt i8 %x, -1
  
  $ /repositories/alive/alive.py /tmp/test.ll 
  ----------------------------------------
  Optimization: lshr ugt
  Precondition: (ComputeNumSignBits(C2) <= C1)
    %a = lshr i8 %x, C1
    %r = icmp ugt i8 %a, C2
  =>
    %r = icmp slt i8 %x, 0
  
  
  ERROR: Mismatch in values of i1 %r
  
  Example:
  %x i8 = 0x80 (128, -128)
  C1 i8 = 0x07 (7)
  C2 i8 = 0xD0 (208, -48)
  %a i8 = 0x01 (1)
  Source value: 0x0 (0)
  Target value: 0x1 (1, -1)

Am i holding it wrong, or is this missing some preconditions?


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94014/new/

https://reviews.llvm.org/D94014