[PATCH] D94168: [RISCV] Add scalable vector icmp ISel patterns

[Craig Topper via Phabricator via llvm-commits]

craig.topper accepted this revision.
craig.topper added a comment.
This revision is now accepted and ready to land.

LGTM with that one auto changed.



================
Comment at: llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:9082
+  if (N->getOpcode() == ISD::SPLAT_VECTOR) {
+    auto VecEltVT = N->getValueType(0).getVectorElementType();
+    if (auto *CN = dyn_cast<ConstantSDNode>(N->getOperand(0))) {
----------------
Use EVT here instead of auto.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D94168/new/

https://reviews.llvm.org/D94168