[PATCH] D94171: [SVE][CodeGen] Fix legalisation of floating-point masked gathers

Kerry McLaughlin via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 8 06:42:56 PST 2021


kmclaughlin updated this revision to Diff 315375.
kmclaughlin added a comment.

Removed the `isVectorUnpack` helper added in the previous revision. If the index values are already extended to i64 by an unpkhi/lo, then the gather does not also need to extend the index.
This affects the masked_gather_nxv4f64 test, which has been updated as follows:

  sunpklo z1.d, z0.s
  sunpkhi z2.d, z0.s
  ld1d { z0.d }, p1/z, [x0, z1.d, sxtw #3]
  ld1d { z1.d }, p0/z, [x0, z2.d, sxtw #3]

->

  sunpklo z1.d, z0.s
  sunpkhi z2.d, z0.s
  ld1d { z0.d }, p1/z, [x0, z1.d, lsl #3]
  ld1d { z1.d }, p0/z, [x0, z2.d, lsl #3]




CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94171/new/

https://reviews.llvm.org/D94171

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td
  llvm/test/CodeGen/AArch64/sve-masked-gather-legalize.ll

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