[PATCH] D94291: [VE][NFC] Clean ISel patterns for LSV and LVS

[Kazushi Marukawa via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG99c84af1a25a: [VE][NFC] Clean ISel patterns for LSV and LVS (authored by kaz7).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94291/new/

https://reviews.llvm.org/D94291

Files:
  llvm/lib/Target/VE/VEInstrIntrinsicVL.td


Index: llvm/lib/Target/VE/VEInstrIntrinsicVL.td
===================================================================
--- llvm/lib/Target/VE/VEInstrIntrinsicVL.td
+++ llvm/lib/Target/VE/VEInstrIntrinsicVL.td
@@ -1,25 +1,21 @@
-// Pattern Matchings for VEL Intrinsics
+/// Pattern Matchings for VEL intrinsic instructions.
 
-// Define intrinsics written by hand
+/// Intrinsic patterns written by hand.
 
 // SVOB pattern.
 def : Pat<(int_ve_vl_svob), (SVOB)>;
 
-// The lsv and lvs patterns
+// LSV patterns.
 def : Pat<(int_ve_vl_lsv_vvss v256f64:$pt, i32:$sy, i64:$sz),
-          (LSVrr_v (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32),
-                   i64:$sz, v256f64:$pt)>;
+          (LSVrr_v (i2l i32:$sy), i64:$sz, v256f64:$pt)>;
+
+// LVS patterns.
 def : Pat<(int_ve_vl_lvsl_svs v256f64:$vx, i32:$sy),
-          (LVSvr v256f64:$vx,
-                 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
+          (LVSvr v256f64:$vx, (i2l i32:$sy))>;
 def : Pat<(int_ve_vl_lvsd_svs v256f64:$vx, i32:$sy),
-          (LVSvr v256f64:$vx,
-                 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy, sub_i32))>;
+          (LVSvr v256f64:$vx, (i2l i32:$sy))>;
 def : Pat<(int_ve_vl_lvss_svs v256f64:$vx, i32:$sy),
-          (EXTRACT_SUBREG (LVSvr v256f64:$vx,
-                                 (INSERT_SUBREG (i64 (IMPLICIT_DEF)), i32:$sy,
-                                                sub_i32)),
-                          sub_f32)>;
+          (l2f (LVSvr v256f64:$vx, (i2l i32:$sy)))>;
 
-// Define intrinsics automatically generated
+/// Intrinsic patterns automatically generated.
 include "VEInstrIntrinsicVL.gen.td"


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