[PATCH] D93300: [PowerPC] Exploit paddi instruction on Power 10 for constant materialization

Victor Huang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Jan 6 11:36:33 PST 2021


NeHuang added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1030
+  unsigned TO = countTrailingOnes<uint64_t>(Imm);
+  unsigned FO = countLeadingOnes<uint64_t>(Imm << LZ);
+  unsigned Hi32 = Hi_32(Imm);
----------------
why do we name it as FO instead of LO here? can you please explain what FO stands for? 


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:1095
+  if ((LZ + FO + TO) > 30) {
+    APInt SignedInt34 = APInt(34, (Imm >> TO) & 0x3ffffffff);
+    APInt Extended = SignedInt34.sext(64);
----------------
Can we merge the code for the three patterns? Maybe we can do something like: 
Var = TZ/30-LZ/TO for different scenarios and use Var below (feel free to change Var to other name):

```
    APInt SignedInt34 = APInt(34, (Imm >> (Var)) & 0x3ffffffff);
    APInt Extended = SignedInt34.sext(64);
    Result = CurDAG->getMachineNode(PPC::PLI8, dl, MVT::i64,
                                    getI64Imm(*Extended.getRawData()));
    return CurDAG->getMachineNode(PPC::RLDICL, dl, MVT::i64, SDValue(Result, 0),
                                  getI32Imm(Var), getI32Imm(LZ));
```


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93300/new/

https://reviews.llvm.org/D93300



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