[PATCH] D93599: [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' style patterns
Sanjay Patel via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 6 10:37:38 PST 2021
spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.
LGTM - see inline for possible missed comment.
================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3959
+
+ // For all/any comparisons, replace or(x,shl(y,bw/2)) with and/or(x,y).
+ bool CmpZero = N1C->getAPIntValue().isNullValue();
----------------
spatel wrote:
> Add an example to this comment to make it clearer which patterns we are handling:
> // When high 32-bits of i64 X are known clear:
> // all bits clear: (X | (Y<<32)) == 0 --> (X | Y) == 0
> // all bits set: (X | (Y<<32)) == -1 --> (X & Y) == -1
I still think it would be nice to add a code comment like this. This code block is big enough that it's hard to recognize the whole patterns that we are transforming.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D93599/new/
https://reviews.llvm.org/D93599
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