[PATCH] D91255: [AArch64] Rearrange mul(dup(sext/zext)) to mul(sext/zext(dup))
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Jan 6 05:44:13 PST 2021
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks. LGTM with a couple of suggestions.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11714
+
+ if (VectorShuffle.getOpcode() != ISD::VECTOR_SHUFFLE)
+ return SDValue();
----------------
You can probably remove this now and just rely on the dyn_cast<ShuffleVectorSDNode> check below.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11724
+ if (!ShuffleNode->isSplat() || ShuffleNode->getSplatIndex() != 0)
+ // Non-zero mask
+ return SDValue();
----------------
Maybe move this comment up above the if, to avoid the misleading indentation.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:11733-11739
+ ConstantSDNode *Constant;
+ // Ensures the insert is inserting into lane 0
+ if (!(Constant = dyn_cast<ConstantSDNode>(InsertLane.getNode())))
+ return SDValue();
+
+ if (Constant->getZExtValue() != 0)
+ return SDValue();
----------------
Maybe something like this?
```
// Ensures the insert is inserting into lane 0
auto *Constant = dyn_cast<ConstantSDNode>(InsertLane.getNode());
if (!Constant || Constant->getZExtValue() != 0)
return SDValue();
```
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D91255/new/
https://reviews.llvm.org/D91255
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