[PATCH] D94152: GlobalISel: Fail legalization on narrowing extload below memory size

[Matt Arsenault via Phabricator via llvm-commits]

arsenm created this revision.
arsenm added reviewers: paquette, aemerson, aditya_nandakumar, dsanders.
Herald added subscribers: kerbowa, hiraditya, rovka, nhaehnle, jvesely.
arsenm requested review of this revision.
Herald added a subscriber: wdng.
Herald added a project: LLVM.

https://reviews.llvm.org/D94152

Files:
  llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
  llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir


Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
+++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-zextload-global.mir
@@ -11,6 +11,7 @@
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s32>) = G_ZEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_zextload_global_v2i32_from_4)
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_ZEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_zextload_global_v2i64_from_4)
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_ZEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_zextload_global_v2i64_from_8)
+# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s128) = G_ZEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_zextload_global_s128_8)
 # ERR-NOT: remark
 
 ---
@@ -315,3 +316,22 @@
     %1:_(<2 x s64>) = G_ZEXTLOAD %0 :: (load 8, addrspace 1)
     $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
 ...
+
+---
+name: test_zextload_global_s128_8
+body: |
+  bb.0:
+    liveins: $vgpr0_vgpr1
+
+    ; GFX8-LABEL: name: test_zextload_global_s128_8
+    ; GFX8: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+    ; GFX8: [[ZEXTLOAD:%[0-9]+]]:_(s128) = G_ZEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1)
+    ; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ZEXTLOAD]](s128)
+    ; GFX6-LABEL: name: test_zextload_global_s128_8
+    ; GFX6: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+    ; GFX6: [[ZEXTLOAD:%[0-9]+]]:_(s128) = G_ZEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1)
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[ZEXTLOAD]](s128)
+    %0:_(p1) = COPY $vgpr0_vgpr1
+    %1:_(s128) = G_ZEXTLOAD %0 :: (load 8, addrspace 1)
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
+...
Index: llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
+++ llvm/test/CodeGen/AMDGPU/GlobalISel/legalize-sextload-global.mir
@@ -11,6 +11,7 @@
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s32>) = G_SEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_sextload_global_v2i32_from_4)
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_SEXTLOAD %0:_(p1) :: (load 4, addrspace 1) (in function: test_sextload_global_v2i64_from_4)
 # ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(<2 x s64>) = G_SEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_sextload_global_v2i64_from_8)
+# ERR-NEXT: remark: <unknown>:0:0: unable to legalize instruction: %1:_(s128) = G_SEXTLOAD %0:_(p1) :: (load 8, addrspace 1) (in function: test_sextload_global_s128_8)
 # ERR-NOT: remark
 
 ---
@@ -315,3 +316,22 @@
     %1:_(<2 x s64>) = G_SEXTLOAD %0 :: (load 8, addrspace 1)
     $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
 ...
+
+---
+name: test_sextload_global_s128_8
+body: |
+  bb.0:
+    liveins: $vgpr0_vgpr1
+
+    ; GFX8-LABEL: name: test_sextload_global_s128_8
+    ; GFX8: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+    ; GFX8: [[SEXTLOAD:%[0-9]+]]:_(s128) = G_SEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1)
+    ; GFX8: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[SEXTLOAD]](s128)
+    ; GFX6-LABEL: name: test_sextload_global_s128_8
+    ; GFX6: [[COPY:%[0-9]+]]:_(p1) = COPY $vgpr0_vgpr1
+    ; GFX6: [[SEXTLOAD:%[0-9]+]]:_(s128) = G_SEXTLOAD [[COPY]](p1) :: (load 8, addrspace 1)
+    ; GFX6: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[SEXTLOAD]](s128)
+    %0:_(p1) = COPY $vgpr0_vgpr1
+    %1:_(s128) = G_SEXTLOAD %0 :: (load 8, addrspace 1)
+    $vgpr0_vgpr1_vgpr2_vgpr3 = COPY %1
+...
Index: llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
===================================================================
--- llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
+++ llvm/lib/CodeGen/GlobalISel/LegalizerHelper.cpp
@@ -962,10 +962,15 @@
 
     Register TmpReg = MRI.createGenericVirtualRegister(NarrowTy);
     auto &MMO = **MI.memoperands_begin();
-    if (MMO.getSizeInBits() == NarrowSize) {
+    unsigned MemSize = MMO.getSizeInBits();
+
+    if (MemSize == NarrowSize) {
       MIRBuilder.buildLoad(TmpReg, PtrReg, MMO);
-    } else {
+    } else if (MemSize < NarrowSize) {
       MIRBuilder.buildLoadInstr(MI.getOpcode(), TmpReg, PtrReg, MMO);
+    } else if (MemSize > NarrowSize) {
+      // FIXME: Need to split the load.
+      return UnableToLegalize;
     }
 
     if (ZExt)


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