[PATCH] D94143: [AArch64] Add support for the GNU ILP32 ABI

[Amanieu d'Antras via Phabricator via llvm-commits]

Amanieu created this revision.
Amanieu added reviewers: t.p.northover, aemerson, kristof.beyls, joelkevinjones.
Herald added subscribers: dexonsmith, danielkiss, JDevlieghere, hiraditya.
Amanieu requested review of this revision.
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Add the aarch64[_be]-*-gnu_ilp32 targets to support the GNU ILP32 ABI for AArch64.

The needed codegen changes were mostly already implemented in D61259 <https://reviews.llvm.org/D61259>, which added support for the watchOS ILP32 ABI. The main changes are:

- Wiring up the new target to enable ILP32 codegen and MC.
- ILP32 va_list support.
- ILP32 TLSDESC relocation support.

There was existing MC support for ELF ILP32 relocations from D25159 <https://reviews.llvm.org/D25159> which could be enabled by passing "-target-abi ilp32" to llvm-mc. This was changed to check for "gnu_ilp32" in the target triple instead. This shouldn't cause any issues since the existing support was slightly broken: it was generating ELF64 objects instead of the ELF32 object files expected by the GNU ILP32 toolchain.

This target has been tested by running the full rustc testsuite on a big-endian ILP32 system based on the GCC ILP32 toolchain.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D94143

Files:
  llvm/include/llvm/ADT/Triple.h
  llvm/lib/CodeGen/TargetLoweringObjectFileImpl.cpp
  llvm/lib/Support/Triple.cpp
  llvm/lib/Target/AArch64/AArch64AsmPrinter.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64Subtarget.h
  llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
  llvm/lib/Target/AArch64/AsmParser/AArch64AsmParser.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64AsmBackend.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64ELFObjectWriter.cpp
  llvm/lib/Target/AArch64/MCTargetDesc/AArch64MCAsmInfo.cpp
  llvm/test/CodeGen/AArch64/ilp32-tlsdesc.ll
  llvm/test/CodeGen/AArch64/ilp32-va.ll
  llvm/test/MC/AArch64/adrp-relocation.s
  llvm/test/MC/AArch64/arm32-elf-relocs.s
  llvm/test/MC/AArch64/arm64-elf-reloc-condbr.s
  llvm/test/MC/AArch64/arm64-ilp32.s
  llvm/test/MC/AArch64/elf-reloc-ldrlit.s
  llvm/test/MC/AArch64/elf-reloc-tstb.s
  llvm/test/MC/AArch64/elf-reloc-uncondbrimm.s
  llvm/test/MC/AArch64/ilp32-diagnostics.s

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