[PATCH] D94073: [RISCV] Add vector integer mul/mulh/div/rem ISel patterns

[Craig Topper via Phabricator via llvm-commits]

craig.topper added a comment.

I think this specific issue on REM should be fixed after 4ef91f5871a3c38bb2324f89b47a2a845e8a33fd <https://reviews.llvm.org/rG4ef91f5871a3c38bb2324f89b47a2a845e8a33fd>


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D94073/new/

https://reviews.llvm.org/D94073