[PATCH] D94096: [AArch64] Add a Machine Value Type for aarch64_ls64.
Alexandros Lamprineas via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jan 5 08:42:47 PST 2021
labrinea created this revision.
labrinea added reviewers: llvm-commits, t.p.northover, ab, kristof.beyls, simon_tatham.
Herald added subscribers: dexonsmith, danielkiss, hiraditya.
labrinea requested review of this revision.
Herald added a project: LLVM.
This patch adds a MVT for the new LLVM IR type introduced in https://reviews.llvm.org/D94091. It is named `i64x8` since we essentially materialize it as a sequence of eight general purpose registers.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D94096
Files:
llvm/include/llvm/CodeGen/ValueTypes.td
llvm/include/llvm/Support/MachineValueType.h
llvm/lib/CodeGen/ValueTypes.cpp
llvm/utils/TableGen/CodeGenTarget.cpp
Index: llvm/utils/TableGen/CodeGenTarget.cpp
===================================================================
--- llvm/utils/TableGen/CodeGenTarget.cpp
+++ llvm/utils/TableGen/CodeGenTarget.cpp
@@ -77,6 +77,7 @@
case MVT::ppcf128: return "MVT::ppcf128";
case MVT::x86mmx: return "MVT::x86mmx";
case MVT::x86amx: return "MVT::x86amx";
+ case MVT::i64x8: return "MVT::i64x8";
case MVT::Glue: return "MVT::Glue";
case MVT::isVoid: return "MVT::isVoid";
case MVT::v1i1: return "MVT::v1i1";
Index: llvm/lib/CodeGen/ValueTypes.cpp
===================================================================
--- llvm/lib/CodeGen/ValueTypes.cpp
+++ llvm/lib/CodeGen/ValueTypes.cpp
@@ -165,6 +165,7 @@
case MVT::Glue: return "glue";
case MVT::x86mmx: return "x86mmx";
case MVT::x86amx: return "x86amx";
+ case MVT::i64x8: return "i64x8";
case MVT::Metadata: return "Metadata";
case MVT::Untyped: return "Untyped";
case MVT::exnref: return "exnref";
@@ -197,6 +198,7 @@
case MVT::ppcf128: return Type::getPPC_FP128Ty(Context);
case MVT::x86mmx: return Type::getX86_MMXTy(Context);
case MVT::x86amx: return Type::getX86_AMXTy(Context);
+ case MVT::i64x8: return Type::getAArch64_LS64Ty(Context);
case MVT::v1i1:
return FixedVectorType::get(Type::getInt1Ty(Context), 1);
case MVT::v2i1:
@@ -504,6 +506,7 @@
case Type::X86_FP80TyID: return MVT(MVT::f80);
case Type::X86_MMXTyID: return MVT(MVT::x86mmx);
case Type::X86_AMXTyID: return MVT(MVT::x86amx);
+ case Type::AArch64_LS64TyID: return MVT(MVT::i64x8);
case Type::FP128TyID: return MVT(MVT::f128);
case Type::PPC_FP128TyID: return MVT(MVT::ppcf128);
case Type::PointerTyID: return MVT(MVT::iPTR);
Index: llvm/include/llvm/Support/MachineValueType.h
===================================================================
--- llvm/include/llvm/Support/MachineValueType.h
+++ llvm/include/llvm/Support/MachineValueType.h
@@ -248,9 +248,10 @@
funcref = 162, // WebAssembly's funcref type
externref = 163, // WebAssembly's externref type
x86amx = 164, // This is an X86 AMX value
+ i64x8 = 165, // 8 consecutive GPRs (AArch64)
FIRST_VALUETYPE = 1, // This is always the beginning of the list.
- LAST_VALUETYPE = 165, // This always remains at the end of the list.
+ LAST_VALUETYPE = 166, // This always remains at the end of the list.
// This is the current maximum for LAST_VALUETYPE.
// MVT::MAX_ALLOWED_VALUETYPE is used for asserts and to size bit vectors
@@ -924,6 +925,7 @@
case nxv16f16:
case nxv8f32:
case nxv4f64: return TypeSize::Scalable(256);
+ case i64x8:
case v512i1:
case v64i8:
case v32i16:
Index: llvm/include/llvm/CodeGen/ValueTypes.td
===================================================================
--- llvm/include/llvm/CodeGen/ValueTypes.td
+++ llvm/include/llvm/CodeGen/ValueTypes.td
@@ -197,6 +197,7 @@
def funcref : ValueType<0 , 162>; // WebAssembly's funcref type
def externref : ValueType<0 , 163>; // WebAssembly's externref type
def x86amx : ValueType<8192, 164>; // X86 AMX value
+def i64x8 : ValueType<512, 165>; // 8 Consecutive GPRs (AArch64)
def token : ValueType<0 , 248>; // TokenTy
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