[PATCH] D93599: [DAG] Simplify OR(X,SHL(Y,BW/2)) eq/ne 0/-1 'all/any-of' style patterns

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon updated this revision to Diff 314580.
RKSimon added a comment.

Improve handling of AND/OR(OR(X2,SHL(Y2,BW/2)) , OR(X1,SHL(Y1,BW/2)) ) style patterns to fix remaining movmsk patterns


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93599/new/

https://reviews.llvm.org/D93599

Files:
  llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/movmsk-cmp.ll

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