[PATCH] D93687: [VE] Extract & insert vector element isel

[Kazushi Marukawa via Phabricator via llvm-commits]

kaz7 added a comment.

A few more modificating candidates to make code better.



================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:2002
+
+    if (Op.getValueType() == MVT::f32) {
+      Result = DAG.getBitcast(MVT::f32, Result);
----------------
`Op.getValueType()` returns EVT.  I guess using `Op.getSimpleValueType()` is better for this.


================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:2005
+    } else {
+      assert(Op.getValueType() == MVT::i32);
+    }
----------------
`Op.getSimpleValueType()`


================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:2032
+  SDValue Idx = Op.getOperand(2);
+  if (Idx.getValueType() == MVT::i32)
+    Idx = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Idx);
----------------
`Idx.getSimpleValueType()`


================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:2034
+    Idx = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Idx);
+  if (Val.getValueType() == MVT::f32)
+    Val = DAG.getBitcast(MVT::i32, Val);
----------------
`Val.getSimpleValueType()`


================
Comment at: llvm/lib/Target/VE/VEISelLowering.cpp:2036
+    Val = DAG.getBitcast(MVT::i32, Val);
+  assert(Val.getValueType() == MVT::i32);
+  Val = DAG.getNode(ISD::ZERO_EXTEND, DL, MVT::i64, Val);
----------------
`Val.getSimpleValueType()`


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D93687