[PATCH] D59259: [AArch64] Use faddp to implement fadd reductions.
Dave Green via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jan 4 10:24:12 PST 2021
dmgreen accepted this revision.
dmgreen added a comment.
This revision is now accepted and ready to land.
Thanks. LGTM
================
Comment at: llvm/test/CodeGen/AArch64/vecreduce-fadd.ll:112
; CHECKNOFP16-NEXT: ret
%r = call fast float @llvm.vector.reduce.fadd.f32.v4f32(float -0.0, <4 x float> %bin.rdx)
ret float %r
----------------
Can you make sure there is some test where the first element isn't -0.0. (I think it should work fine, but it would be good to make sure there is a test for it)
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https://reviews.llvm.org/D59259/new/
https://reviews.llvm.org/D59259
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