[PATCH] D93622: [ARM] Extend lowering for i64 reductions

[Sjoerd Meijer via Phabricator via llvm-commits]

SjoerdMeijer added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:14968
+    EVT AVT = A.getValueType();
+    if (AVT.getSizeInBits() != 128)
+      A = DAG.getNode(ExtendCode, dl,
----------------
I guess it would be better to replace 128 with a TTI call to query the size of vector registers? I forgot which hook that is though.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93622/new/

https://reviews.llvm.org/D93622