[PATCH] D93983: RegAllocFast: Do not free later early-clobbered registers.

Freddy, Ye via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Jan 3 19:24:25 PST 2021


FreddyYe added inline comments.


================
Comment at: llvm/test/CodeGen/X86/phys-msInline-fastregalloc.ll:11
+  %m32 = bitcast { [4 x i32] }* %c to [4 x i32]*
+  %0 = call i32 asm sideeffect inteldialect "mov eax,$$1\0A\09mov $0,eax", "=*m,={eax},~{eax},~{dirflag},~{fpsr},~{flags}"([4 x i32]* %m32) #1, !srcloc !3
+  store i32 %0, i32* %retval, align 4
----------------
FreddyYe wrote:
> LuoYuanke wrote:
> > It seems to be invalid inline assembly. We can't set eax both as output and clobber. The clobbered register and output register should be in different physical register.
> > 
> > ```
> > [llvm]$ cat t.c
> > 
> > void foo(int a, int b) {
> >   int c;
> >   asm volatile("addl %1, %2 \n"
> >                "movl %2, %0\n"
> >                :"=a"(c)
> >                :"r"(a), "r"(b)
> >                :"eax");
> > }
> > [llvm]$ clang -S t.c
> > t.c:8:17: error: asm-specifier for input or output variable conflicts with asm clobber list
> >                :"eax");
> >                 ^
> > 1 error generated.
> > [llvm]$ gcc -S t.c
> > t.c: In function ‘foo’:
> > t.c:4:3: error: ‘asm’ operand has impossible constraints
> >     4 |   asm volatile("addl %1, %2 \n"
> >       |   ^~~
> > [llvm]$
> > ```
> > 
> > This is from https://llvm.org/docs/LangRef.html#output-constraints.
> > 
> > ```
> > If this is not safe (e.g. if the assembly contains two instructions, where the first writes to one output, and the second reads an input and writes to a second output), then the “&” modifier must be used (e.g. “=&r”) to specify that the output is an “early-clobber” output. Marking an output as “early-clobber” ensures that LLVM will not use the same register for any inputs (other than an input tied to this output).
> > ```
> > The eax is an output, so front-end need to mark the early-clobber for eax with "=&{eax}", so it seems to be a front-end issue?
> Thanks for review! Sorry for failing to know this output constraint in IR before. Yes, both GNU inline asm and llvm IR don't allow setting one register both as output and clobber. So the front-end seems to deal wrong with MS inline assembler. Seems like clang front-end always generate `={eax}` and set each output register in asm as clobber when dealing with MS inline assembler. So this conflict may happen in clang front-end. I will abandon this review.
I'll double check on conclusions above.


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  https://reviews.llvm.org/D93983/new/

https://reviews.llvm.org/D93983



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