[llvm] d9f306a - [LV] Fix crash when generating remarks with multi-exit loops.

[Philip Reames via llvm-commits]

Thanks!

Philip

On 1/1/21 5:57 AM, Florian Hahn via llvm-commits wrote:
> Author: Florian Hahn
> Date: 2021-01-01T13:54:41Z
> New Revision: d9f306aa52fe233a711af2d5baa0d6536f164b10
>
> URL: https://github.com/llvm/llvm-project/commit/d9f306aa52fe233a711af2d5baa0d6536f164b10
> DIFF: https://github.com/llvm/llvm-project/commit/d9f306aa52fe233a711af2d5baa0d6536f164b10.diff
>
> LOG: [LV] Fix crash when generating remarks with multi-exit loops.
>
> If DoExtraAnalysis is true (e.g. because remarks are enabled), we
> continue with the analysis rather than exiting. Update code to
> conditionally check if the ExitBB has phis or not a single predecessor.
> Otherwise a nullptr is dereferenced with DoExtraAnalysis.
>
> Added:
>      llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
>
> Modified:
>      llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
>
> Removed:
>      
>
>
> ################################################################################
> diff  --git a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
> index 65b3132dc3f1..3906b11ba4b9 100644
> --- a/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
> +++ b/llvm/lib/Transforms/Vectorize/LoopVectorizationLegality.cpp
> @@ -1110,22 +1110,22 @@ bool LoopVectorizationLegality::canVectorizeLoopCFG(Loop *Lp,
>         Result = false;
>       else
>         return false;
> -  }
> -
> -  // The existing code assumes that LCSSA implies that phis are single entry
> -  // (which was true when we had at most a single exiting edge from the latch).
> -  // In general, there's nothing which prevents an LCSSA phi in exit block from
> -  // having two or more values if there are multiple exiting edges leading to
> -  // the exit block.  (TODO: implement general case)
> -  if (!llvm::empty(ExitBB->phis()) && !ExitBB->getSinglePredecessor()) {
> -    reportVectorizationFailure("The loop must have no live-out values if "
> -                               "it has more than one exiting block",
> -        "loop control flow is not understood by vectorizer",
> -        "CFGNotUnderstood", ORE, TheLoop);
> -    if (DoExtraAnalysis)
> -      Result = false;
> -    else
> -      return false;
> +  } else {
> +    // The existing code assumes that LCSSA implies that phis are single entry
> +    // (which was true when we had at most a single exiting edge from the latch).
> +    // In general, there's nothing which prevents an LCSSA phi in exit block from
> +    // having two or more values if there are multiple exiting edges leading to
> +    // the exit block.  (TODO: implement general case)
> +    if (!llvm::empty(ExitBB->phis()) && !ExitBB->getSinglePredecessor()) {
> +      reportVectorizationFailure("The loop must have no live-out values if "
> +                                 "it has more than one exiting block",
> +          "loop control flow is not understood by vectorizer",
> +          "CFGNotUnderstood", ORE, TheLoop);
> +      if (DoExtraAnalysis)
> +        Result = false;
> +      else
> +        return false;
> +    }
>     }
>   
>     return Result;
>
> diff  --git a/llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll b/llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
> new file mode 100644
> index 000000000000..7cbff7acc14b
> --- /dev/null
> +++ b/llvm/test/Transforms/LoopVectorize/remarks-multi-exit-loops.ll
> @@ -0,0 +1,28 @@
> +; RUN: opt -disable-output -loop-vectorize -pass-remarks-analysis='.*' -force-vector-width=2 2>&1 %s | FileCheck %s
> +
> +; Make sure LV does not crash when generating remarks for loops with non-unique
> +; exit blocks.
> +define i32 @test_non_unique_exit_blocks(i32* nocapture readonly align 4 dereferenceable(1024) %data, i32 %x) {
> +; CHECK: loop not vectorized: loop control flow is not understood by vectorizer
> +;
> +entry:
> +  br label %for.header
> +
> +for.header:                                         ; preds = %for.cond.lr.ph, %for.body
> +  %iv = phi i64 [ 0, %entry ], [ %iv.next, %for.latch ]
> +  %iv.next = add nuw nsw i64 %iv, 1
> +  %exitcond.not = icmp eq i64 %iv.next, 256
> +  br i1 %exitcond.not, label %header.exit, label %for.latch
> +
> +for.latch:
> +  %arrayidx = getelementptr inbounds i32, i32* %data, i64 %iv
> +  %lv = load i32, i32* %arrayidx, align 4
> +  %cmp1 = icmp eq i32 %lv, %x
> +  br i1 %cmp1, label %latch.exit, label %for.header
> +
> +header.exit:                       ; preds = %for.body
> +  ret i32 0
> +
> +latch.exit:                       ; preds = %for.body
> +  ret i32 %lv
> +}
>
>
>          
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