[PATCH] D92015: [DAGCombiner] Fold BRCOND(FREEZE(COND)) to BRCOND(COND)

Juneyoung Lee via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jan 1 06:03:33 PST 2021


aqjune added a comment.

Thanks! I precommitted it.

BTW, @nlopes suggested that this might require more attention from backend people, with a broader context.
The undef/poison-related semantics in the SelDag/MachineIR should be discussed & explicitly stated in detail.
My idea is to clarify the low-level IR semantics as follows:

- SelDag: has undef/poison, but branching on them is nondet choice. This allows the brcond(freeze(cond)) -> brcond(cond) folding, but now it is illegal to use branch condition to optimize code in SelDag. In order to use branch condition, the condition should be recorded using e.g., llvm.assume from IR when lowering.

- MachineIR: has no undef/poison; all values are well-defined. This will make many reasonings easier & also make the end-to-end compilation of freeze instruction valid (currently we need FREEZE in MachineIR :/ ) This will require IMPLICIT_DEF to have 'frozen value'.

For GlobalISel, I have no idea right now... it should be somewhere between SelDag and MachineIR? Or can be simply assume that it is equivalent to MachineIR?

Maybe I can initiate a discussion about this to llvm-dev when I have enough bandwidth (maybe at the end of Jan..? There are quite a few things going on: lifetime, logical and/or, shufflevector, and my research.. 🧐 ).

Once it is settled, it should be documented somewhere. Is there a documentation like LangRef for SelDag/MachineIR? What I've seen is only comments in ISDOpcodes.h/TargetOpcodes.def .


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