[PATCH] D88389: [M68k] (Patch 3/8) Basic infrastructures and target description files

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Dec 30 13:08:41 PST 2020


craig.topper added inline comments.


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Comment at: llvm/lib/Target/M68k/M68kInstrFormats.td:93
+/// bit a     - use alternative, used to select index register or
+///             outer dispacement/immediate
+/// suffix NP means non-padded
----------------
dispacement -> displacement


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Comment at: llvm/lib/Target/M68k/M68kInstrFormats.td:179
+///
+/// If the EA is a direct register use the 3 bit is known to distinguish
+/// between Data and Address register types and bits 5 and 4 are 0. This allows
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"use the 3 bit is known" doesn't make sense to me. I'm not sure what's it supposed to say. "the 3 bits are known"? Or something else?


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Comment at: llvm/lib/Target/M68k/M68kInstrFormats.td:200
+
+// NOTE: freaking tablegen...
+def MxEncEAr_0: MxEncEA<MxBeadDAReg<0>, MxBead2Bits<0b00>>;
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This comment should be removed or explain what problem tablegen is causing otherwise its useless.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D88389/new/

https://reviews.llvm.org/D88389



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