[PATCH] D93932: [RISCV] Define vector narrowing type-convert intrinsic.

[Monk Chiang via Phabricator via llvm-commits]

monkchiang updated this revision to Diff 314102.
monkchiang added a comment.

1. Add earlyclobber constraint
2. support float16 to i8 conversion for vfncvt.xu.f / vfncvt.x.f / vfncvt.rtz.xu.f / vfcvt.rtz.x.f


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93932/new/

https://reviews.llvm.org/D93932

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll

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