[PATCH] D93855: [RISCV] Define vector widening type-convert intrinsic.
Monk Chiang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Dec 30 04:52:15 PST 2020
monkchiang updated this revision to Diff 314100.
monkchiang added a comment.
1. Add earlyclobber constraint
2. vfwcvt.f.xu and vfwcvt.f.x support i8 to float16 conversion
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93855/new/
https://reviews.llvm.org/D93855
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D93855.314100.patch
Type: text/x-patch
Size: 185198 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20201230/440bb987/attachment-0001.bin>
More information about the llvm-commits
mailing list