[PATCH] D93933: [RISCV] Define vector single-width type-convert intrinsic.

[Monk Chiang via Phabricator via llvm-commits]

monkchiang created this revision.
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Define intrinsics:

1. vfcvt.xu.f.v/vfcvt.x.f.v
2. vfcvt.rtz.xu.f.v/vfcvt.rtz.x.f.v
3. vfcvt.f.xu.v/vfcvt.f.x.v

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Monk Chiang <monk.chiang at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93933

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-f-x-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-f-xu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-rtz-xu-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfcvt-xu-f-rv64.ll

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