[PATCH] D93932: [RISCV] Define vector narrowing type-convert intrinsic.
Monk Chiang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 29 22:58:01 PST 2020
monkchiang created this revision.
monkchiang added reviewers: evandro, craig.topper, rogfer01, frasercrmck, HsiangKai.
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Define intrinsics:
1. vfncvt.xu.f.w/vfncvt.x.f.w
2. vfncvt.rtz.xu.f.w/vfncvt.rtz.x.f.w
3. vfncvt.f.xu.w/vfncvt.f.x.w
4. vfncvt.f.f.w/vfncvt.rod.f.f.w
We work with @rogfer01 from BSC to come out this patch.
Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Monk Chiang <monk.chiang at sifive.com>
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93932
Files:
llvm/include/llvm/IR/IntrinsicsRISCV.td
llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-x-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-f-xu-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rod-f-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-x-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-rtz-xu-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-x-f-rv64.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv32.ll
llvm/test/CodeGen/RISCV/rvv/vfncvt-xu-f-rv64.ll
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