[PATCH] D93855: [RISCV] Define vector widening type-convert intrinsic.

[Monk Chiang via Phabricator via llvm-commits]

monkchiang updated this revision to Diff 314057.
monkchiang added a comment.

Remove i64 to float in RV32 test case for fwcvt.xu.f.v/fwcvt.x.f.v/fwcvt.rtz.xu.f.v/fwcvt.rtz.x.f.v intrinsic.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93855/new/

https://reviews.llvm.org/D93855

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-x-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-f-xu-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-rtz-xu-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-x-f-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwcvt-xu-f-rv64.ll

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