[PATCH] D93887: [RISCV] Add intrinsic testcase for some missing widening reduction.

[Monk Chiang via Phabricator via llvm-commits]

monkchiang added a comment.

In D93887#2474206 <https://reviews.llvm.org/D93887#2474206>, @craig.topper wrote:

> In D93887#2474176 <https://reviews.llvm.org/D93887#2474176>, @monkchiang wrote:
>
>> Add missing float->double tests for rv32.
>
> Are you also going to add the integer tests to this patch or will that be another patch?

Yes, some of floating-pointing intrinsic also miss double type in rv32. such as vfadd, vsub etc... 
I will use this patch to add those missing test cases.



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Comment at: llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll:1
-; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+f,+experimental-zfh -verify-machineinstrs \
+; RUN: llc -mtriple=riscv32 -mattr=+experimental-v,+d,+experimental-zfh -verify-machineinstrs \
 ; RUN:   --riscv-no-aliases < %s | FileCheck %s
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The D set is needed, SEW up to ELEN = max(XLEN,FLEN) are required to be supported


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https://reviews.llvm.org/D93887