[PATCH] D93092: [PowerPC] KnownBits should be constant when performing non-sign comparison
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Dec 29 03:49:55 PST 2020
nemanjai added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:13192
- if (Op1Known.Zero != Op2Known.Zero || Op1Known.One != Op2Known.One)
+ if (!Op1Known.isConstant() || !Op2Known.isConstant() ||
+ Op1Known.getConstant() != Op2Known.getConstant())
----------------
Hmm, but we've cleared bit zero from both known zero and known ones for both. So they will both be non-constant, won't they? I think that we would have to rewrite the above lines to something like this:
```
// We don't really care about what is known about the first bit (if
// anything), so pretend that it is known zero for both to ensure
// they can be compared as constants.
Op1Known.Zero.setBit(0); Op1Known.One.clearBit(0);
Op2Known.Zero.setBit(0); Op2Known.One.clearBit(0);
```
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D93092/new/
https://reviews.llvm.org/D93092
More information about the llvm-commits
mailing list