[PATCH] D93807: [RISCV] Define vector widening reduction intrinsic.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll:12
+; CHECK-LABEL: intrinsic_vfwredosum_vs_nxv2f32_nxv32f16_nxv2f32
+; CHECK:       vsetvli {{.*}}, {{a[0-9]+}}, e16,m8,ta,mu
+; CHECK:       vfwredosum.vs {{v[0-9]+}}, {{v[0-9]+}}, {{v[0-9]+}}
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Why are theses tests only covering lmul=8? And why is f32->f64 missing from the rv32 tests? Sorry I missed this in my original review. I trusted the script too much.


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  https://reviews.llvm.org/D93807/new/

https://reviews.llvm.org/D93807