[PATCH] D93850: [InstCombine] Rewrite (switch (zext X)) as (switch X).
    Chenguang Wang via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Mon Dec 28 11:32:13 PST 2020
    
    
  
wecing marked an inline comment as done.
wecing added inline comments.
================
Comment at: llvm/lib/Transforms/InstCombine/InstructionCombining.cpp:2952-2953
+  if (match(Cond, m_ZExtOrSExt(m_Value(CastOp)))) {
+    unsigned CastOpWidth = computeKnownBits(CastOp, 0, &SI).getBitWidth();
+    if (NewWidth > 0 && NewWidth <= CastOpWidth) {
+      for (auto Case : SI.cases()) {
----------------
lebedev.ri wrote:
> Why do we need this?
This handles cases like this:
```
  %zx = zext i32 %x to i64
  switch i64 %zx, label %bb2 [
    i64 0x7fff_ffff_ffff_ffff, label %bb1 ; exceeds i32 range
  ]
```
The `0x7fff_ffff_ffff_ffff` has 1 leading zero, so `LeadingKnownZeros` will be 1, and `NewWidth` will be 64-1 = 63, which exceeds the range of i32.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93850/new/
https://reviews.llvm.org/D93850
    
    
More information about the llvm-commits
mailing list