[PATCH] D93836: [VE] Change default CPU name to "generic"
Kazushi Marukawa via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sun Dec 27 06:30:47 PST 2020
kaz7 created this revision.
kaz7 added reviewers: simoll, k-ishizaka.
kaz7 added projects: LLVM, VE.
Herald added a subscriber: hiraditya.
kaz7 requested review of this revision.
Herald added a subscriber: llvm-commits.
Change default CPU name of SX-Aurora VE from "ve" to "generic" similar
to other architectures.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D93836
Files:
llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
llvm/lib/Target/VE/VE.td
llvm/lib/Target/VE/VESubtarget.cpp
Index: llvm/lib/Target/VE/VESubtarget.cpp
===================================================================
--- llvm/lib/Target/VE/VESubtarget.cpp
+++ llvm/lib/Target/VE/VESubtarget.cpp
@@ -33,7 +33,7 @@
// Determine default and user specified characteristics
std::string CPUName = std::string(CPU);
if (CPUName.empty())
- CPUName = "ve";
+ CPUName = "generic";
// Parse features string.
ParseSubtargetFeatures(CPUName, /*TuneCPU=*/CPU, FS);
Index: llvm/lib/Target/VE/VE.td
===================================================================
--- llvm/lib/Target/VE/VE.td
+++ llvm/lib/Target/VE/VE.td
@@ -46,7 +46,7 @@
class Proc<string Name, list<SubtargetFeature> Features>
: Processor<Name, NoItineraries, Features>;
-def : Proc<"ve", []>;
+def : Proc<"generic", []>;
//===----------------------------------------------------------------------===//
// Declare the target which we are implementing
Index: llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
===================================================================
--- llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
+++ llvm/lib/Target/VE/MCTargetDesc/VEMCTargetDesc.cpp
@@ -56,7 +56,7 @@
static MCSubtargetInfo *createVEMCSubtargetInfo(const Triple &TT, StringRef CPU,
StringRef FS) {
if (CPU.empty())
- CPU = "ve";
+ CPU = "generic";
return createVEMCSubtargetInfoImpl(TT, CPU, /*TuneCPU=*/CPU, FS);
}
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