[PATCH] D93607: [SVE] Lower vector CTLZ, CTPOP and CTTZ operations.

Sun Dec 27 02:17:50 PST 2020

paulwalker-arm added inline comments.

================
Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:227
+def AArch64not_mt  : PatFrags<(ops node:$pg, node:$op, node:$pt), [(int_aarch64_sve_not  node:$pt, node:$pg, node:$op)]>;
+
 def SDT_AArch64FCVT : SDTypeProfile<1, 3, [
----------------
cameron.mcinally wrote:
> The NOT patterns could use some tests. Or are they required for this patch and I missed it?
This patch doesn't really change anything for NOT, which is still relying directly on the SVE intrinsics for isel.  However, the operand order used by the SVE unary intrinsics is different to that used for _MERGE_PASSTHRU nodes:

SVE unary intrinsic = OP <PASSTHRU> <PG> <OPERAND>
Unary_MERGE_PATHRU = OP <PG> <OPERAND> <PATHTHRU>

The above PatFrags is just shuffling the intrinsic operands so that sve_int_un_pred_arit_1 can take a single "op" parameter and have a single set of patterns. The existing tests within sve-intrinsics-logical.ll should ensure that I've not broken isel for the affected intrinsics cls, cnot and not.

I didn't realise this operand shuffling was possibly so I've likely added unnecessary int_op and ir_op parameters to some of the classes under past patches.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93607/new/

https://reviews.llvm.org/D93607