[PATCH] D93807: [RISCV] Define vector widening reduction intrinsic.

Monk Chiang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Dec 24 18:12:28 PST 2020


monkchiang created this revision.
monkchiang added reviewers: craig.topper, rogfer01, frasercrmck, evandro.
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Define vwredsumu/vwredsum/vfwredosum/vfwredsum

We work with @rogfer01 from BSC to come out this patch.

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: Zakk Chen <zakk.chen at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93807

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwredosum-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfwredsum-rv64.ll

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