[PATCH] D93317: [LV] Vectorize (some) early and multiple exit loops

[Ayal Zaks via Phabricator via llvm-commits]

Ayal added a comment.

In D93317#2470271 <https://reviews.llvm.org/D93317#2470271>, @fhahn wrote:

> I think there are some scenarios when we break some  LCSSA PHIs that use PHIs created  during SCEV expansion when we generate the runtime checks. After a first glance, it appears like an issue after we  add the conditional branch from the `middle` block. The example below should cause a verifier failure with `opt -loop-vectorize -force-vector-width=4`. I tried to reduce it a bit, but unfortunately it is still quite ugly.

Hmm, if it is reduced a bit further by fusing bb9 into bb5, making the loop bottom-tested, same failure still occurs, regardless of this patch?

I.e., replacing:

  bb5:                                              ; preds = %bb9, %bb4
    %tmp6 = phi i64 [ %tmp7, %bb9 ], [ %N, %bb4 ]
    %tmp7 = add nsw i64 %tmp6, -1
    %tmp8 = icmp sgt i64 %tmp6, 1
    br i1 %tmp8, label %bb9, label %bb13
  
  bb9:                                              ; preds = %bb5
    %tmp10 = getelementptr inbounds i16, i16* %tmp2, i64 %tmp7
    %tmp11 = load i16, i16* %tmp10, align 2
    %tmp12 = getelementptr inbounds i16, i16* %tmp, i64 0
    store i16 %tmp11, i16* %tmp12, align 2
    br label %bb5

with:

  bb5:                                              ; preds = %bb5, %bb4
    %tmp6 = phi i64 [ %tmp7, %bb5 ], [ %N, %bb4 ]
    %tmp7 = add nsw i64 %tmp6, -1
    %tmp8 = icmp sgt i64 %tmp6, 1
    %tmp10 = getelementptr inbounds i16, i16* %tmp2, i64 %tmp7
    %tmp11 = load i16, i16* %tmp10, align 2
    %tmp12 = getelementptr inbounds i16, i16* %tmp, i64 0
    store i16 %tmp11, i16* %tmp12, align 2
    br i1 %tmp8, label %bb5, label %bb13


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93317/new/

https://reviews.llvm.org/D93317