[PATCH] D55301: RegAlloc: Allow targets to split register allocation

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1270
+          // finalization.
+          unsigned FIOp = AMDGPU::getNamedOperandIdx(MI.getOpcode(),
+                                                     AMDGPU::OpName::vaddr);
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rampitec wrote:
> It can be saddr with flat scratch. It seems it needs to be fixed in a separate patch first.
Never mind, this is one of SI_SPILL opcodes, not real instruction yet.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D55301/new/

https://reviews.llvm.org/D55301