[PATCH] D92156: [PowerPC] Add support for "tlbiel" with two arguments

[Nick Desaulniers via Phabricator via llvm-commits]

nickdesaulniers added a comment.

In D92156#2461763 <https://reviews.llvm.org/D92156#2461763>, @jsji wrote:

> `tlbie` is different from `tlbiel`.

Ah, sorry, I made a mistake in my comment above <https://reviews.llvm.org/D92156#2459303>.

> Yes, `tlbie` will support 2 operands mne and 5 operands.
>
> But `tlbiel` will support 1 operand mne and 5 operands.

But it looks like Clang today will reject the 5 operand `tlbiel` format:

  $ cat foo.s
  foo:
    tlbiel 6
    tlbiel 6,0,0,0,0
  $ clang --target=powerpc64le-linux-gnu foo.s 
  foo.s:3:12: error: invalid operand for instruction
    tlbiel 6,0,0,0,0
             ^

So we cannot modify the Linux kernel to use 5 operand form if LLVM rejects it.

In D92156#2461984 <https://reviews.llvm.org/D92156#2461984>, @jsji wrote:

> @nickdesaulniers If you still find kernel using 2 operands `tlbiel` (not `tlbie`), can you please help to show what is the reason of using it? for what purpose does the Linux kernel use "tlbiel RB,RS"?  Thanks.
>
> Note that for old CPU (P6 <https://reviews.llvm.org/P6> and before), the two operand `tlbiel` is actually `tlbiel, RB, L`, which L is a constant, not a register. 
> So if the code using 2 operand `tlbiel` is for P6 <https://reviews.llvm.org/P6> and older, then we need to support that old format instead new InstAlias `tlbiel RB,RS`.

I'm not sure what P6 <https://reviews.llvm.org/P6> is precisely, but it looks like the kernel is using `tibiel RB, L` (the inline asm is using `"i"` constraint for immediates) for targeting `-mcpu=pwr8`, in arch/powerpc/mm/book3s64/hash_native.c. Even with this patch, LLVM rejects the 5 operand variant.  I also do not see any tests for 5 operand variant in llvm-project/.

So I think we should accept this patch adding support for 2 operand `tlbiel` if you would be so kind to check the encoding, since the 5 operand variant is definitely not supported in LLVM at the moment.  I'm not sure if it's possible to limit the 2 operand variant to only older CPU targets?


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