[PATCH] D93312: [RISCV] Add ISel support for RVV .vx and .vi forms

Fraser Cormack via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Dec 22 09:22:28 PST 2020


frasercrmck added a comment.

In D93312#2468263 <https://reviews.llvm.org/D93312#2468263>, @craig.topper wrote:

> I said SDNode because that seemed to be the naming convention being used for them. I singled them out because right now you’re the only one working on them. We have a lot of intrinsic patches in flight that I didn’t want to interfere with. I don’t know which to view as more first class. The intrinsics will have full instruction coverage. Maybe we put all patterns in separate files. And leave the instructions by themselves. We’re also going to need to support fixed vectors and Simon Moll’s VP intrinsics.

Yeah I don't think now is the time to move the intrinsic patterns anywhere. I like the sound of eventually having all patterns in separate files though. Take a look at what I've just pushed and see if you think that'll work as a first step.


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