[PATCH] D93691: [RISCV] Add intrinsics for vf[n]macc/vf[n]msac/vf[n]madd/vf[n]msub instructions

[ShihPo Hung via Phabricator via llvm-commits]

arcbbb created this revision.
arcbbb added reviewers: craig.topper, evandro, rogfer01, frasercrmck.
Herald added subscribers: NickHung, luismarques, apazos, sameer.abuasal, pzheng, s.egerton, lenary, Jim, benna, psnobl, jocewei, PkmX, the_o, brucehoult, MartinMosbeck, edward-jones, zzheng, jrtc27, shiva0217, kito-cheng, niosHD, sabuasal, simoncook, johnrusso, rbar, asb, hiraditya.
arcbbb requested review of this revision.
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This patch defines vfmadd/vfnmacc, vfmsac/vfnmsac, vfmadd/vfnmadd,
and vfmsub/vfnmsub lower to V instructions.

      

Authored-by: Roger Ferrer Ibanez <rofirrim at gmail.com>
Co-Authored-by: ShihPo Hung <shihpo.hung at sifive.com>


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D93691

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVPseudos.td
  llvm/test/CodeGen/RISCV/rvv/vfmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfmsub-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmacc-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmadd-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsac-rv64.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv32.ll
  llvm/test/CodeGen/RISCV/rvv/vfnmsub-rv64.ll